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INTEGRATED CIRCUITS
DATA SHEET
TDA8705 6-bit high-speed dual Analog-to-Digital Converter (ADC)
Product specification Supersedes data of November 1994 File under Integrated Circuits, IC02 1996 Jan 12
Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
FEATURES * 2 times 6-bit resolution * Sampling rate up to 40 MHz * High signal-to-noise ratio over a large analog input frequency range (5.8 effective bits at 10 MHz full-scale input at fclk = 40 MHz * TTL output * Two separated inputs (AC-coupling) * TTL compatible digital inputs * Low-level AC clock input signal allowed * Internal reference voltage regulator (external reference regulation possible) * Power dissipation only 250 mW (typical) * Low analog input capacitance, no buffer amplifier required * No sample-and-hold circuit required. QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO ILE DLE AILE fclk(max) Ptot Note 1. Full-scale sine wave (fi = 10 MHz; fclk = 40 MHz). ORDERING INFORMATION TYPE NUMBER TDA8705T PACKAGE NAME SO28 DESCRIPTION plastic small outline package; 28 leads; body width 7.5 mm PARAMETER analog supply voltage digital supply voltage output stages supply voltage analog supply current digital supply current output stages supply current DC integral linear error DC differential linearity error AC integral linearity error maximum clock frequency total power dissipation note 1 CONDITIONS MIN. 4.75 4.75 4.75 20 10 10 - - - 40 - TYP. 5.0 5.0 5.0 27 14 14 0.25 0.25 0.5 - 250 APPLICATIONS
TDA8705
High-speed analog-to-digital conversion for: * DBS (Digital Broadcast Satellite) * QPSK (Quadrature Phase Shift Keying) demodulation * Video. GENERAL DESCRIPTION The TDA8705 is a 6-bit high-speed dual analog-to-digital converter (ADC) for satellite video and other applications. It converts the two analog input signals into two 6-bit binary-coded digital words at a maximum sampling rate of 40 MHz. All digital inputs and outputs are TTL compatible, although a low-level sine wave clock input signal is allowed.
MAX. 5.25 5.25 5.25 32 18 18 0.5 0.5 1.0 - - V V V
UNIT
mA mA mA LSB LSB LSB MHz mW
VERSION SOT136-1
1996 Jan 12
2
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reference V voltage TOP RTA A analog voltage input A 5 V IA 6 R INTA reference V voltage BOTTOM RBA A reference voltage MIDDLE A reference V RMA voltage TOP V RTB B V RMB reference voltage MIDDLE B 4 23 D0A LSB 9 12 14 R INTB 20 D5B 19 D4B analog voltage input B V IB 11 ANALOG -TO-DIGITAL CONVERTER B 6 LATCHES TTL OUTPUTS 18 D3B 17 D2B 16 D1B reference V RBB voltage BOTTOM B 13 15 D0B LSB data outputs MSB
BLOCK DIAGRAM
Philips Semiconductors
6-bit high-speed dual Analog-to-Digital Converter (ADC)
DEC 10 REGULATOR
V CCA 8
V CCD 2
V CCO 21
28 D5A 27 D4A ANALOG -TO-DIGITAL CONVERTER A 6 LATCHES TTL OUTPUTS 26 D3A 25 D2A 24 D1A
MSB
data outputs
TDA8705
handbook, full pagewidth
3
CLOCK DRIVER
Product specification
TDA8705
22 OGND output ground
7 AGND analog ground
3 DGND digital ground
1
MLC113
CLK
Fig.1 Block diagram.
Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
PINNING SYMBOL CLK VCCD DGND VRBA VRTA VIA AGND VCCA VRMA DEC VIB VRTB VRBB VRMB D0B D1B D2B D3B D4B D5B VCCO OGND D0A D1A D2A D3A D4A D5A PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 clock input digital supply voltage (+5 V) digital ground reference voltage BOTTOM for ADC A (decoupling) reference voltage TOP for ADC A (decoupling) analog input voltage for ADC A analog ground analog supply voltage (+5 V) reference voltage MIDDLE for ADC A (decoupling) decoupling input analog input voltage for ADC B reference voltage TOP for ADC B (decoupling) reference voltage BOTTOM for ADC B (decoupling) reference voltage MIDDLE for ADC B (decoupling) data output; bit 0 (LSB), ADC B data output; bit 1, ADC B data output; bit 2, ADC B data output; bit 3, ADC B data output; bit 4, ADC B data output; bit 5 (MSB), ADC B supply voltage for output stages (+5 V) output ground data output; bit 0 (LSB), ADC A data output; bit 1, ADC A data output; bit 2, ADC A data output; bit 3, ADC A data output; bit 4, ADC A data output; bit 5 (MSB), ADC A Fig.2 Pin configuration.
handbook, halfpage
TDA8705
DESCRIPTION
CLK V CCD DGND V RBA V RTA V IA AGND VCCA V RMA
1 2 3 4 5 6 7
28 27 26 25 24 23 22
D5A D4A D3A D2A D1A D0A OGND V CCO D5B D4B D3B D2B D1B D0B
TDA8705
8 9 21 20 19 18 17 16 15
MLC114
DEC 10 V IB 11 V RTB 12 V RBB 13 V RMB 14
1996 Jan 12
4
Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCCA VCCD VCCO VCC VCC VCC VI Vclk(p-p) IO Tstg Tamb Tj Note PARAMETER analog supply voltage digital supply voltage output stages supply voltage supply voltage differences between VCCA and VCCD supply voltage differences between VCCO and VCCD supply voltage differences between VCCA and VCCO input voltage AC input voltage for switching (peak-to-peak value) output current storage temperature operating ambient temperature junction temperature referenced to AGND referenced to DGND CONDITIONS note 1 note 1 note 1 MIN. -0.3 -0.3 -0.3 -1.0 -1.0 -1.0 -0.3 - - -55 0 -
TDA8705
MAX. +7.0 +7.0 +7.0 +1.0 +1.0 +1.0 +7.0 VCCD 10 +150 +70 +150 V V V V V V V V
UNIT
mA C C C
1. The supply voltages VCCA, VCCO and VCCD may have any value between -0.3 V and +7.0 V provided the difference between VCCA, VCCO and VCCD is between -1 V and +1 V. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE 70 UNIT K/W
1996 Jan 12
5
Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
TDA8705
CHARACTERISTICS VCCA = V8 to V7 = 4.75 to 5.25 V; VCCD = V2 to V3 = 4.75 to 5.25 V; VCCO = V21 to V22 = 4.75 to 5.25 V; AGND, OGND and DGND shorted together; VCCA to VCCD = -0.25 to +0.25 V; VCCO to VCCD = -0.25 to +0.25 V; VCCA to VCCO = -0.25 to +0.25 V; Tamb = 0 to +70 C; typical values measured at VCCA = VCCD = VCCO = 5 V and Tamb = 25 C; CL = 15 pF; unless otherwise specified. SYMBOL Supply VCCA VCCD VCCO ICCA ICCD ICCO Inputs CLOCK INPUT CLK; REFERENCED TO DGND; note 1 VIL VIH IIL IIH ZI CI RI CI CT VRB VRT Vdiff Iref RLAD TCRLAD VosB VosT Vi(p-p) LOW level input voltage HIGH level input voltage LOW level input current HIGH level input current input impedance input capacitance Vclk = 0.4 V Vclk = 2.7 V fclk = 40 MHz fclk = 40 MHz 0 2.0 -1 - - - 20 fi = 10 MHz fi = 10 MHz - 40 - - - - 2 2 - 1.5 - 0.8 VCCD +1 20 - - - - - V V A A k pF analog supply voltage digital supply voltage output stages supply voltage analog supply current digital supply current output stages supply current 4.75 4.75 4.75 20 10 10 5.0 5.0 5.0 27 14 14 5.25 5.25 5.25 32 18 18 V V V mA mA mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VI ANALOG INPUT VOLTAGE FOR A AND B; REFERENCED TO AGND DC parallel input resistance parallel input capacitance crosstalk between VIA and VIB reference voltage BOTTOM reference voltage TOP differential reference voltage VRT - VRB reference current resistor ladder temperature coefficient of the resistor ladder offset voltage BOTTOM offset voltage TOP input voltage amplitude (peak-to-peak value) note 2 note 2 k pF dB
Reference voltages for the resistor ladder A and B; see Table 1 1.9 2.8 0.85 - - - - - 0.45 2.0 2.9 0.90 2 450 3280 200 200 0.50 2.1 3.0 0.95 - - - - - 0.55 V V V mA ppm mV mV V
Outputs; A and B DIGITAL OUTPUTS D5 TO D0; REFERENCED TO DGND VOL VOH LOW level output voltage HIGH level output voltage IO = 1 mA IO = -1 mA 6 0 2.4 - - 0.4 VCCD V V
1996 Jan 12
Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA8705
MAX.
UNIT
Switching characteristics CLOCK INPUT CLK; note 1; see Fig.3 fclk(max) tCPH tCPL maximum clock frequency clock pulse width HIGH clock pulse width LOW 40 10 10 - - - - - - MHz ns ns
Analog signal processing LINEARITY ILE DLE AILE OFE GE MID DC integral linearity error DC differential linearity error AC integral linearity error offset error between A and B gain error between A and B middle scale output code A and B -0.5 dB analog bandwidth analog input settling time LOW-to-HIGH analog input settling time HIGH-to-LOW note 3 fi = 10 MHz; fclk = 40 MHz; note 4 fi = 10 MHz; fclk = 40 MHz; note 4 input voltage floating - - - 1 1 31 - - - 0.25 0.25 0.5 - - - 50 8 5 0.5 0.5 1.0 2 2 32 - - - LSB LSB LSB LSB LSB
BANDWIDTH; fclk = 40 MHz B tSTLH tSTHL full-scale sine wave; note 5 full-scale square wave; Fig.4; note 6 full-scale square wave; Fig.4; note 6 MHz ns ns
HARMONICS; fclk = 40 MHZ; see Fig.5 h1 hall fundamental harmonics (full scale) harmonics (full scale); all components second harmonics third harmonics THD total harmonic distortion fi = 10 MHz without harmonics; fclk = 40 MHz; fi = 10 MHz fclk = 40 MHz fi = 10 MHz fi = 20 MHz TWO-TONE; note 8 TTIR two-tone intermodulation rejection fclk = 40 MHz - 48 - dB - - 5.8 5.6 - - bits bits SIGNAL-TO-NOISE RATIO; note 7; see Fig.5 S/N signal-to-noise ratio (full scale) 34 37 - dB fi = 10 MHz fi = 10 MHz - - - -49 -51 -46 - - -40 dB dB dB - - 0 dB
EFFECTIVE BITS; note 7; see Figs 5 and 6 EB effective bits
1996 Jan 12
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Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
SYMBOL BIT ERROR RATE BER bit error rate fclk = 40 MHz; fi = 10 MHz; VI = 16 LSB at code 32 - 10-13 PARAMETER CONDITIONS MIN. TYP.
TDA8705
MAX. -
UNIT
times/ samples
Timing; fclk = 40 MHz; CL = 15 pF; note 9; see Fig.3 tds th td Notes 1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock must not be less than 1 ns. 2. Analog input voltages producing code 00 up to and including 3F: a) VosB (voltage offset BOTTOM) is the difference between the analog input which produces data equal to 00 and the reference voltage BOTTOM (VRB) at Tamb = 25 C. b) VosT (voltage offset TOP) is the difference between VRT (reference voltage TOP) and the analog input which produces data outputs equal to 3F at Tamb = 25 C. 3. Full-scale sine wave (fi = 10 MHz; fclk = 40 MHz). 4. The Offset Error (OFE) and Gain Error (GE) are determined by taking results from a simultaneous acquisition on both ADCs of a sine wave greater than full-scale. The occurrences of code 0 and 63 are used to calculate the OFE (mid-scale-to-mid-scale) and the GE (amplitude difference) between the two converters A and B. 5. The -0.5 dB analog bandwidth is determined by the 0.5 dB reduction in the reconstructed output, the input being a full-scale sine wave. It is determined with a beat frequency method; no glitches occurrence. 6. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square-wave signal) in order to sample the signal and obtain correct output data. 7. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB x 6.02 + 1.76 dB. 8. Intermodulation measured relative to either tone with analog input frequencies of 10.0 MHz and 10.1 MHz. The two input signals have the same amplitude and the total amplitude of both signals provides full scale to the converter. 9. Output data acquisition: the output data is available after the maximum delay time of td. sampling delay time output hold time output delay time - 5 - - - - 2 - 14 ns ns ns
1996 Jan 12
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Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
Table 1 Output coding and input voltage (typical values; referenced to AGND) VI(p-p) A or B (V) <2.2 2.2 2.208 . . 2.692 2.7 >2.7 BINARY OUTPUT BITS D5 0 0 0 . . 1 1 1 D4 0 0 0 . . 1 1 1 D3 0 0 0 . . 1 1 1 D2 0 0 0 . . 1 1 1 D1 0 0 0 . . 1 1 1
TDA8705
STEP Underflow 0 1 . . 62 63 Overflow
D0 0 0 1 . . 0 1 1
handbook, full pagewidth
t CPL t CPH CLK 1.4 V
sample N
sample N + 1
sample N + 2
Vl(n)
t ds DATA D0 to D5 DATA N-2 DATA N-1 td
th 2.4 V DATA N DATA N+1
MLC115
1.4 V 0.4 V
Fig.3 Timing diagram for data output.
handbook, full pagewidth
t STLH code 63 V I(n) code 0 2 ns 50 %
t STHL
50 %
2 ns
CLK
50 %
50 %
MLC116
0.5 ns
0.5 ns
Fig.4 Analog input settling-time diagram.
1996 Jan 12
9
Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
TDA8705
handbook, full pagewidth
0
MLC372
amplitude (dB) 20
40
60
80
100
120 0 2.51 5.02 7.53 10.0 12.6 15.1 17.6 f (MHz) 20.1
Effective bits: 5.83; THD = -46.31 dB; Harmonic levels (dB): 2nd = -51.85; 3rd = -51.11; 4th = -55.73; 5th = -59.89; 6th = -52.68.
Fig.5 Typical Fast Fourier Transform; fclk = 40 MHz; fi = 10 MHz.
handbook, full pagewidth
0
MLC373
amplitude (dB) 20
40
60
80
100
120 0 2.50 5.0 7.51 10.0 12.5 15.0 17.5 f (MHz) 20.0
Effective bits: 5.65; THD = -41.79 dB; Harmonic levels (dB): 2nd = -51.73; 3rd = -42.51; 4th = -65.18; 5th = -57.48; 6th = -58.98.
Fig.6 Typical Fast Fourier Transform; fclk = 40 MHz; fi = 20 MHz.
1996 Jan 12
10
Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
APPLICATION INFORMATION
TDA8705
100 nF
handbook, full pagewidth
CLK V CCD DGND
1 2 3 4 5 6 7
28 27 26 25 24 23 22
D5A D4A D3A D2A D1A D0A OGND V CCO D5B D4B D3B D2B D1B D0B 100 nF 5V
5V
100 nF 100 nF input A C LA
(1)
V RBA V RTA V IA AGND
5V 100 nF 100 nF 1 nF (2) input B C LB
(1)
VCCA V RMA DEC V IB V RTB V RBB V RMB
TDA8705
8 9 10 11 12 13 14 21 20 19 18 17 16 15
MLC117
100 nF 100 nF 100 nF
The analog and digital supplies should be separated and decoupled. VRT(n), VRM(n) and VRB(n) and DEC inputs are decoupled to AGND. (1) In the event of AC-coupling, CLA and CLB values are chosen in accordance with the classical low frequencies cut-off formulae 1 f CL = ------------------------------------- where input resistance RI is the value measured under DC conditions. 2 x x RI x CL In the event of DC-coupling, CLA and CLB capacitors are omitted. The DC biassing and AC modulation signal directly applied to inputs (pin 6 and 11), must be in the range of VRT(n) - VRB(n). (2) When pin 10 (DEC) is short-circuited to AGND, an external regulator can be connected to VRT(n) and VRB(n).
Fig.7 Application diagram.
1996 Jan 12
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Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
PACKAGE OUTLINE SO28: plastic small outline package; 28 leads; body width 7.5 mm
TDA8705
SOT136-1
D
E
A X
c y HE vMA
Z 28 15
Q A2 A1 pin 1 index Lp L 1 e bp 14 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 18.1 17.7 0.71 0.69 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT136-1 REFERENCES IEC 075E06 JEDEC MS-013AE EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-24 97-05-22
1996 Jan 12
12
Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering
TDA8705
Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1996 Jan 12
13
Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8705
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1996 Jan 12
14
Philips Semiconductors
Product specification
6-bit high-speed dual Analog-to-Digital Converter (ADC)
NOTES
TDA8705
1996 Jan 12
15
Philips Semiconductors - a worldwide company
Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213, Tel. (01)60 101-1236, Fax. (01)60 101-1211 Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands, Tel. (31)40-2783749, Fax. (31)40-2788399 Brazil: Rua do Rocio 220 - 5th floor, Suite 51, CEP: 04552-903-SAO PAULO-SP, Brazil, P.O. Box 7383 (01064-970), Tel. (011)821-2333, Fax. (011)829-1849 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS: Tel. (800) 234-7381, Fax. (708) 296-8556 Chile: Av. Santa Maria 0760, SANTIAGO, Tel. (02)773 816, Fax. (02)777 6730 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. (852)2319 7888, Fax. (852)2319 7700 Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17, 77621 BOGOTA, Tel. (571)249 7624/(571)217 4609, Fax. (571)217 4549 Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. (45)32 88 26 36, Fax. (45)31 57 19 49 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. (358)0-615 800, Fax. (358)0-61580 920 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. (01)4099 6161, Fax. (01)4099 6427 Germany: P.O. Box 10 51 40, 20035 HAMBURG, Tel. (040)23 53 60, Fax. (040)23 53 63 00 Greece: No. 15, 25th March Street, GR 17778 TAVROS, Tel. (01)4894 339/4894 911, Fax. (01)4814 240 India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, Bombay 400 018 Tel. (022)4938 541, Fax. (022)4938 722 Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4, P.O. Box 4252, JAKARTA 12950, Tel. (021)5201 122, Fax. (021)5205 189 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. (01)7640 000, Fax. (01)7640 200 Italy: PHILIPS SEMICONDUCTORS S.r.l., Piazza IV Novembre 3, 20124 MILANO, Tel. (0039)2 6752 2531, Fax. (0039)2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2 -chome, Minato-ku, TOKYO 108, Tel. (03)3740 5130, Fax. (03)3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. (02)709-1412, Fax. (02)709-1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905, Tel. 9-5(800)234-7381, Fax. (708)296-8556 Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. (040)2783749, Fax. (040)2788399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. (09)849-4160, Fax. (09)849-7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. (022)74 8000, Fax. (022)74 8341 Pakistan: Philips Electrical Industries of Pakistan Ltd., Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton, KARACHI 75600, Tel. (021)587 4641-49, Fax. (021)577035/5874546 Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. (63) 2 816 6380, Fax. (63) 2 817 3474 Portugal: PHILIPS PORTUGUESA, S.A., Rua dr. Antonio Loureiro Borges 5, Arquiparque - Miraflores, Apartado 300, 2795 LINDA-A-VELHA, Tel. (01)4163160/4163333, Fax. (01)4163174/4163366 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. (65)350 2000, Fax. (65)251 6500 South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430, Johannesburg 2000, Tel. (011)470-5911, Fax. (011)470-5494 Spain: Balmes 22, 08007 BARCELONA, Tel. (03)301 6312, Fax. (03)301 42 43 Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM, Tel. (0)8-632 2000, Fax. (0)8-632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. (01)488 2211, Fax. (01)481 77 30 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978, TAIPEI 100, Tel. (886) 2 382 4443, Fax. (886) 2 382 4444 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, Bangkok 10260, THAILAND, Tel. (66) 2 745-4090, Fax. (66) 2 398-0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. (0 212)279 27 70, Fax. (0212)282 67 07 Ukraine: Philips UKRAINE, 2A Akademika Koroleva str., Office 165, 252148 KIEV, Tel. 380-44-4760297, Fax. 380-44-4766991 United Kingdom: Philips Semiconductors LTD., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. (0181)730-5000, Fax. (0181)754-8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556 Uruguay: Coronel Mora 433, MONTEVIDEO, Tel. (02)70-4044, Fax. (02)92 0601
Internet: http://www.semiconductors.philips.com/ps/ For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-2724825 SCDS47 (c) Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1100/02/pp16 Document order number: Date of release: 1996 Jan 12 9397 750 00568

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